34TH IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems – DFT 2021
DFT is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI and nanotechnology systems inclusive of emerging technologies. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field. All aspects of design, manufacturing, test, reliability, and availability that are affected by defects during manufacturing and by faults during system operation are of interest.
The 34th edition of DFT initially scheduled to take place in Athens (Greece) will be held as a virtual event on October 6-8, 2021.
Sylvain Guilley will give a speech on “Assessment of side-channel information leakage in cryptographic circuits” on Friday, October 8th, at 6:00 PM (CEST).
Side-channel leakage is hard to diagnose on a real system as there can be multiple sources contributing to the leakage. Therefore, the methodology to patch a system and remove leaks does not really exist, and the real solution consists in changing the software with the hope that such modification hopefully reduces the leakage below an amount that is tolerable. This situation is not satisfying, and on the opposite, a constructive method to attribute leakages to some variables or instructions in the assembly or even in the source code would be desired. This talk will describe a methodology to pinpoint leakages at the pre-silicon stage. The methodology will consist in expressing the leakage under Boolean equations, and checking them on the device netlist. We show how this methodology can even apply to detecting at the pre-silicon stage the presence of glitches which can be responsible for the first-order leakage in randomly masked netlists (otherwise assumed secure).